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MIPS64, SPARC64 and maybe others could probably all benefit slightly from<BR> the closure marker being a 4 byte -1 instead of an INTEGER.<BR>
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That is: 64bit architectures with a fixed size 4 byte instruction where alignment is checked<BR><BR>
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That is, we should probably make their be a per-target variable "closure marker size"<BR> that is 4 for all current targets (IA64 should probably be 16 though),<BR> though one would have to look into the various instruction encodings.<BR><BR>
<BR> - Jay<BR> </body>
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