<DIV style="font-family:Arial, sans-serif; font-size:10pt;"><BR><BR>-Rodney Bates<BR><BR>--- jay.krell@cornell.edu wrote:<BR><BR>From: Jay K <jay.krell@cornell.edu><BR>To: Darko Volaric <lists@darko.org>, Rodney Bates <rodney_bates@lcwb.coop><BR>CC: m3devel <m3devel@elegosoft.com><BR>Subject: RE: [M3devel] Another Allow_packed_byte_aligned issue<BR>Date: Sun, 27 Sep 2015 05:21:34 +0000<BR><BR>
<DIV dir="ltr">I forgot to mention/ask: "packed" basically means "no padding", right?<BR><BR>Yes, inside a record/object/array, if the field has a BITS n FOR ... type, then the<BR>language says it has no leading padding and occupies exactly n bits. Or if that<BR>can't/won't be done, then it has to give a compile-time error, but it can't compile<BR>with some other bit layout properties. <BR><BR>BTW, there is really no such thing as a packed record. Only fields are packed.<BR>So there could be a mix of packed/unpacked fields, each one laid out according <BR>to the packed rule or compiler's choice. <BR> <BR> - Jay<BR><BR> <BR><DIV><HR>From: jay.krell@cornell.edu<BR>To: lists@darko.org; rodney_bates@lcwb.coop<BR>Date: Sun, 27 Sep 2015 05:17:14 +0000<BR>CC: m3devel@elegosoft.com<BR>Subject: Re: [M3devel] Another Allow_packed_byte_aligned issue<BR><BR>
<DIV dir="ltr">I agree it is probably messed up, but I wonder if another approach or approaches can/should be taken.<DIV><BR></DIV><DIV>1)</DIV><DIV><BR></DIV><DIV>I wonder if the boolean should be true for all targets.</DIV><DIV>And the pragmas removed, or changed to do nothing.</DIV><DIV><BR></DIV><DIV>And, here comes the important part:</DIV><DIV> for any unaligned load/store, m3front break it down into multiple smaller loads/stores</DIV><DIV><BR></DIV><DIV><BR></DIV><DIV>Upsides:</DIV><DIV> same predictable layout for all targets</DIV><DIV> same does-it-compile/does-it-not-compile behavior for all targets</DIV><DIV><BR></DIV><DIV>Downsides:</DIV><DIV> possibly atomic accesses are no longer atomic</DIV><DIV> possibly "efficient" accesses are no longer atomic.</DIV><DIV><BR></DIV><DIV>2)</DIV><DIV>Similar to before:</DIV><DIV> allow same layouts on all architecures</DIV><DIV><BR></DIV><DIV>but on architectures where alignment doesn't matter much, just do the unaligned loads/stores</DIV><DIV><BR></DIV><DIV>Keep in mind that "interlocked" alignment does reportedly matter on x86 -- x86 is not really entirely alignment-agnostic.</DIV><DIV>I believe alignment of avx loads/stores sometimes matters too -- again, x86 does care sometimes.</DIV><DIV><BR></DIV><DIV>And the rules are more complicated than m3front/m3middle can encode.</DIV><DIV><BR></DIV><DIV>Not that we have any avx data types.</DIV><DIV>I'd have to experiment more on the sse2 stuff which we do presumably use.</DIV><DIV><BR></DIV><DIV>And yes I agree it generates alignment faults on some targets.</DIV><DIV>We should be able to reproduce this easily enough e.g. on SPARC.</DIV><DIV><BR></DIV><DIV>(Not to mention that x86 can be asked to take alignment faults...it is a mode bit in the processor, that just</DIV><DIV>tends to be off.)</DIV><DIV><BR></DIV><DIV> - Jay<BR><BR><BR><DIV><HR>Date: Sat, 26 Sep 2015 18:27:59 -0700<BR>From: lists@darko.org<BR>To: rodney_bates@lcwb.coop<BR>CC: m3devel@elegosoft.com<BR>Subject: Re: [M3devel] Another Allow_packed_byte_aligned issue<BR><BR><DIV dir="ltr"><SPAN style="font-family: Arial,sans-serif; font-size: 13.33px;">I implemented the byte aligned packing functionality and the Allow_packed_byte_</SPAN><SPAN style="font-family: Arial,sans-serif; font-size: 13.33px;">aligned flag was supposed to be a constant that signified that the target CPU allows byte alignment thus relaxing the normal packing restrictions.</SPAN><BR><DIV><SPAN style="font-family: Arial,sans-serif; font-size: 13.33px;"><BR></SPAN></DIV><DIV><FONT face="Arial, sans-serif"><SPAN style="font-size: 13.33px;">I can't speak for the implementation of the pragma (or later changes), but I think it should be removed since (in my mind) it doesn't serve any useful purpose.</SPAN></FONT></DIV><DIV><FONT face="Arial, sans-serif"><SPAN style="font-size: 13.33px;"><BR></SPAN></FONT></DIV></DIV><DIV><BR><DIV>On Sat, Sep 26, 2015 at 12:23 PM, Rodney Bates <SPAN dir="ltr"><<A href="mailto:rodney_bates@lcwb.coop">rodney_bates@lcwb.coop</A>></SPAN> wrote:<BR><BLOCKQUOTE style="padding-left: 1ex; border-left-color: rgb(204, 204, 204); border-left-width: 1px; border-left-style: solid;"><DIV style="font-family: Arial,sans-serif; font-size: 10pt;">In trying to better understand the issue, I see, in Module.m3:895, this code:<BR><BR> Target.Allow_packed_byte_aligned := t.containsLazyAlignments;<BR><BR>From other places, containsLazyAlignments derives from LAZYALIGN <BR>pragmas, so this means it will turn on Allow_packed_byte_aligned,<BR>regardless of the target, if there is a LAZYALIGN pragma. I think this<BR>will generate code that will alignfault, if the target CPU doesn't<BR>support it. That would be a bug. <BR><SPAN><FONT color="#888888"><BR><BR>-Rodney Bates</FONT></SPAN></DIV>
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