[M3commit] CVS Update: cm3

[Antony Hosking]

CVSROOT:	/usr/cvs
Changes by:	hosking at birch.	09/11/10 04:47:49

Modified files:
	cm3/m3-libs/m3core/src/thread/WIN32/: ThreadWin32C.c 

Log message:
	Put the memory barrier stuff here if it is needed for MSC.
	Generally, I prefer using the already-supported gcc intrinsics, which give
	inline instructions where needed.  On x86, a StoreLoad membar can also be
	implemented using CAS/CASP builtins.  This will be preferred for other targets
	than WIN32.  Jay should decide what he wants to do.  It can easily be
	supported by implementing the __sync_* functions that the gcc-based backend
	otherwise implements as intrinsics.  Beware for now that the current gcc-based
	backend is not up-to-date for proper generation of mfence on x86.  We need to
	move to a later version of gcc (gcc-4.4.1?) for that.
	
	Also, I am unconvinced that the current implementation of AssignSlot can ever
	be correct without the critical section.  It requires atomic update of both
	the slots array pointer (with the new slots) *and* the array elements.  This
	requires a proper CS instead of non-blocking synchronization.