[M3commit] CVS Update: cm3

[Jay Krell]

CVSROOT:	/usr/cvs
Changes by:	jkrell at birch.	10/02/14 13:30:45

Modified files:
	cm3/m3-sys/m3back/src/: Codex86.i3 Codex86.m3 M3x86.m3 

Log message:
	fix level of indirection in atomic swap
	Like compareExchange, it suffers from unnecessary enregistration
	of the address of the atomic variable:
	
	0000034A: 8D 35 38 00 00 00  lea         esi,[_MM_Main+38h]
	00000350: 8B 1D 98 00 00 00  mov         ebx,dword ptr [_MM_Main+98h]
	00000356: F0 87 1E           lock xchg   ebx,dword ptr [esi]
	
	which should be more like:
	
	mov         ebx,dword ptr [_MM_Main+98h]
	lock xchg   ebx,[_MM_Main+38h]
	
	two instructions instead of three, one register instead of two
	Though Visual C++ seems to do similar:
	
	; 2    : long __fastcall F1(long b) { return _InterlockedExchange(&a, b); }
	
	00000	8b c1		 mov	 eax, ecx
	00002	b9 00 00 00 00	 mov	 ecx, OFFSET _a
	00007	87 01		 xchg	 DWORD PTR [ecx], eax
	00009	c3		 ret	 0
	
	notice that it uses a smaller mov to generate the address,
	because, you know, the instruction needs relocation anyway,
	you might as well have the relocation include the +38;
	This is probably something we should look into improving across the board in m3back.