[M3commit] CVS Update: cm3

Jay K jay.krell at cornell.edu
Mon Mar 8 17:18:27 CET 2010


diff attached

 
> Date: Mon, 8 Mar 2010 17:03:48 +0000
> To: m3commit at elegosoft.com
> From: jkrell at elego.de
> Subject: [M3commit] CVS Update: cm3
> 
> CVSROOT: /usr/cvs
> Changes by: jkrell at birch. 10/03/08 17:03:48
> 
> Modified files:
> cm3/m3-sys/m3back/src/: M3x86.m3 Stackx86.i3 Stackx86.m3 
> 
> Log message:
> "rewrite" insert to not use tables and to inline 64bit operations
> 
> It is modeled after:
> 
> T insert(T to, T from, uint32 offset, uint32 count)
> {
> T mask = ((~((~(T)0) << count)) << offset);
> return (to & ~mask) | ((from << offset) & mask);
> }
> 
> I spent some time trying to remove the unnecessary instructions.
> No luck yet. The problem is the codegen wants to preserve offset/count
> after we are done with them.
> 
> The usage of the constant "-1" will be optimized later.
> 
> Constant offset and count should generate much better code.
> Just constant offset or count, not much different (shift immediate instead of shift by ecx).
> er, actually the shifts might be significantly optimized.
> Calculation of the mask ought to be better just for constant count, to be looked at later.
> 
> It may be profitable to come up with other formulas.
> These at least are "branch free" (except for the branches within the shifts).
> 
> The basic general patterns are, which you can see follow the C code closely:
> 
> insert Word.32
> 00000226: 8B4DD0 MOV ECX tv.103[_n]
> 00000229: BEFFFFFFFF MOV ESI $4294967295
> 0000022E: D3E6 SHL ESI
> 00000230: F7D6 NOT ESI
> 00000232: 8BF9 MOV EDI ECX This isn't needed!
> 00000234: 8B4DD8 MOV ECX tv.101[_m]
> 00000237: D3E6 SHL ESI
> 00000239: D3E2 SHL EDX
> 0000023B: 23D6 AND EDX ESI
> 0000023D: F7D6 NOT ESI
> 0000023F: 23DE AND EBX ESI
> 00000241: 0BDA OR EBX EDX
> 
> insert Word.64
> 000004EB: 8B4DB0 MOV ECX tv.117[_n]
> 000004EE: BBFFFFFFFF MOV EBX $4294967295
> 000004F3: BEFFFFFFFF MOV ESI $4294967295
> 000004F8: 0FA5DE SHLD ESI EBX ECX
> 000004FB: D3E3 SHL EBX
> 000004FD: F6C120 TEST ECX $32
> 00000500: 7400 JE rel8 L.75
> 00000502: 8BF3 MOV ESI EBX
> 00000504: 33DB XOR EBX EBX
> set_label L.75
> 00000506: F7D3 NOT EBX
> 00000508: F7D6 NOT ESI
> 0000050A: 8BF9 MOV EDI ECX
> 0000050C: 8B4DB8 MOV ECX tv.115[_m]
> 0000050F: 0FA5DE SHLD ESI EBX ECX
> 00000512: D3E3 SHL EBX
> 00000514: F6C120 TEST ECX $32
> 00000517: 7400 JE rel8 L.76
> 00000519: 8BF3 MOV ESI EBX
> 0000051B: 33DB XOR EBX EBX
> set_label L.76
> 0000051D: 0FA5C2 SHLD EDX EAX ECX
> 00000520: D3E0 SHL EAX
> 00000522: F6C120 TEST ECX $32
> 00000525: 7400 JE rel8 L.77
> 00000527: 8BD0 MOV EDX EAX
> 00000529: 33C0 XOR EAX EAX
> set_label L.77
> 0000052B: 23C3 AND EAX EBX
> 0000052D: 23D6 AND EDX ESI
> 0000052F: F7D3 NOT EBX
> 00000531: F7D6 NOT ESI
> declare_temp 4 4 Int.32 F tv.119[T$119] -88
> 00000533: 897DA8 MOV tv.119[T$119] EDI This isn't needed!
> 00000536: 8B7DE8 MOV EDI tv.108[_a64]
> declare_temp 4 4 Int.32 F tv.120[T$120] -92
> 00000539: 894DA4 MOV tv.120[T$120] ECX This isn't needed!
> 0000053C: 8B4DEC MOV ECX tv.108[_a64]+4
> 0000053F: 23FB AND EDI EBX
> 00000541: 23CE AND ECX ESI
> 00000543: 0BF8 OR EDI EAX
> 00000545: 0BCA OR ECX EDX
> free_temp tv.120[T$120]
> free_temp tv.119[T$119]
> 
 		 	   		  
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