[M3commit] CVS Update: cm3
Jay Krell
jkrell at elego.de
Sat Mar 13 19:11:14 CET 2010
CVSROOT: /usr/cvs
Changes by: jkrell at birch. 10/03/13 19:11:14
Modified files:
cm3/m3-sys/m3back/src/: Codex86.m3 M3x86.m3 Stackx86.m3
Log message:
improve all integer compares, some/all set compares
not yet: float compares
old pattern:
cmp
setcc byte in memory
xor reg,reg (any register, I believe)
mov reg, memory
new patterns, depending on comparison/types:
xor reg, reg (register restricted to RegistersForByteOperations = {EAX, EBX, ECX, EDX}
cmp
setcc reg
or
cmp possibly with operands reversed
sbb reg, reg
neg reg
or
cmp possibly with operands reversed
sbb reg, reg
inc reg
There is a little extra pressure on eax,ebx,ecx,edx, but
we save an instruction and we avoid use of an in-memory temporary.
The instruction could have been saved by using movzx as the manuals
recommend anyway, instead of xor+mov.
The sequences are used are based on optimized C.
Basic problem here is setcc which only sets a byte
but we generally want 32bit values.
Possibly more to do here.
The main difficulty developing this change was
that I didn't initially restrict to RegistersForByteOperations.
Small test cases worked ok but cases with more register pressure did not.
see test p232 for a test that currently exercises some of this.
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