[M3devel] atomics addressing modes, it looks like none needed

[Tony Hosking]

OK, so no indexed mode?  gcc may generate it differently.

Antony Hosking | Associate Professor | Computer Science | Purdue University
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On 21 Jan 2010, at 04:11, Jay K wrote:

> I tried a few differnt switches.
> They always seem to get the actual address into a register.
> 
> C:\dev2\cm3.2\m3-sys\m3back\src>type t.c && cl -c -Ox -FAsc t.c && type t.cod
> 
> long __cdecl _InterlockedExchange(long volatile*, long);
> #pragma intrinsic(_InterlockedIncrement)
>  
>  
> long __cdecl _InterlockedIncrement(long volatile*);
> #pragma intrinsic(_InterlockedIncrement)
>  
>  
> long __cdecl _InterlockedExchangeAdd(long volatile*, long);
> #pragma intrinsic(_InterlockedExchangeAdd)
>  
>  
> long __cdecl _InterlockedCompareExchange(long volatile*, long, long);
> #pragma intrinsic(_InterlockedCompareExchange)
>  
>  
> long F1(volatile long* a)
> {
> return _InterlockedIncrement(&a[10]);
> }
>  
> 
> typedef struct S1 { int a; long b; } S1;
> long F2(volatile S1* a)
> {
> return _InterlockedExchangeAdd(&a->b, 123);
> }
>  
> 
> long F3(volatile S1* a)
> {
> return _InterlockedCompareExchange(&a->b, 1, 2);
> }
>  
> 
> long F4(volatile S1* a)
> {
> return _InterlockedExchange(&a->b, 1);
> }
> 
>  
> Microsoft (R) 32-bit C/C++ Optimizing Compiler Version 15.00.21022.08 for 80x86
> Copyright (C) Microsoft Corporation.  All rights reserved.
> t.c
> ; Listing generated by Microsoft (R) Optimizing Compiler Version 15.00.21022.08
> 
>         TITLE   C:\dev2\cm3.2\m3-sys\m3back\src\t.c
>         .686P
>         .XMM
>         include listing.inc
>         .model  flat
> INCLUDELIB LIBCMT
> INCLUDELIB OLDNAMES
> PUBLIC  _F1
> ; Function compile flags: /Ogtpy
> ; File c:\dev2\cm3.2\m3-sys\m3back\src\t.c
> _TEXT   SEGMENT
> _a$ = 8                                                 ; size = 4
> _F1     PROC
> ; 15   : return _InterlockedIncrement(&a[10]);
>   00000 8b 44 24 04      mov     eax, DWORD PTR _a$[esp-4]
>   00004 8d 48 28         lea     ecx, DWORD PTR [eax+40]
>   00007 b8 01 00 00 00   mov     eax, 1
>   0000c f0 0f c1 01      lock     xadd   DWORD PTR [ecx], eax
>   00010 40               inc     eax
> ; 16   : }
>   00011 c3               ret     0
> _F1     ENDP
> _TEXT   ENDS
> PUBLIC  _F2
> ; Function compile flags: /Ogtpy
> _TEXT   SEGMENT
> _a$ = 8                                                 ; size = 4
> _F2     PROC
> ; 23   : return _InterlockedExchangeAdd(&a->b, 123);
>   00020 8b 4c 24 04      mov     ecx, DWORD PTR _a$[esp-4]
>   00024 b8 7b 00 00 00   mov     eax, 123               ; 0000007bH
>   00029 83 c1 04         add     ecx, 4
>   0002c f0 0f c1 01      lock     xadd   DWORD PTR [ecx], eax
> ; 24   : }
>   00030 c3               ret     0
> _F2     ENDP
> _TEXT   ENDS
> PUBLIC  _F3
> ; Function compile flags: /Ogtpy
> _TEXT   SEGMENT
> _a$ = 8                                                 ; size = 4
> _F3     PROC
> ; 29   : return _InterlockedCompareExchange(&a->b, 1, 2);
>   00040 8b 54 24 04      mov     edx, DWORD PTR _a$[esp-4]
>   00044 b9 01 00 00 00   mov     ecx, 1
>   00049 83 c2 04         add     edx, 4
>   0004c b8 02 00 00 00   mov     eax, 2
>   00051 f0 0f b1 0a      lock     cmpxchg DWORD PTR [edx], ecx
> ; 30   : }
>   00055 c3               ret     0
> _F3     ENDP
> _TEXT   ENDS
> PUBLIC  _F4
> ; Function compile flags: /Ogtpy
> _TEXT   SEGMENT
> _a$ = 8                                                 ; size = 4
> _F4     PROC
> ; 35   : return _InterlockedExchange(&a->b, 1);
>   00060 8b 4c 24 04      mov     ecx, DWORD PTR _a$[esp-4]
>   00064 b8 01 00 00 00   mov     eax, 1
>   00069 83 c1 04         add     ecx, 4
>   0006c 87 01            xchg    DWORD PTR [ecx], eax
> ; 36   : }
>   0006e c3               ret     0
> _F4     ENDP
> _TEXT   ENDS
> END
> C:\dev2\cm3.2\m3-sys\m3back\src>
> 
> 
> probably should try IA64 though.
>  
>  
>  - Jay

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