[M3devel] aligned_procedures: suggest "closure_marker_size"
Jay K
jay.krell at cornell.edu
Wed Jan 27 17:17:50 CET 2010
yes, but I think it is target-specific. IA64 would use 16 bytes.
It isn't even in library code, but generated code.
- Jay
From: hosking at cs.purdue.edu
Date: Wed, 27 Jan 2010 10:57:09 -0500
To: jay.krell at cornell.edu
CC: m3devel at elegosoft.com
Subject: Re: [M3devel] aligned_procedures: suggest "closure_marker_size"
If we declare it as a 32-bit subrange it should just work, right?
Antony Hosking | Associate Professor | Computer Science | Purdue University
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On 27 Jan 2010, at 09:01, Jay K wrote:
MIPS64, SPARC64 and maybe others could probably all benefit slightly from
the closure marker being a 4 byte -1 instead of an INTEGER.
That is: 64bit architectures with a fixed size 4 byte instruction where alignment is checked
That is, we should probably make their be a per-target variable "closure marker size"
that is 4 for all current targets (IA64 should probably be 16 though),
though one would have to look into the various instruction encodings.
- Jay
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